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v0.1 editorial change suggestions #67
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The table should cover all possible values for the field. Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
- Add a heading for `mttp` - Remove unnessary distinguishing between S-mode and HS-mode Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
- Sort the descriptions of the MTTL2 types in the same order as the encoding binary values - All MTT PTEs are the same size, not just non-leaf PTEs - Correct issues with the algorithm description: - Most references to "i" are off by one compared to the diagrams because i=0 is not another table, but the bits within an entry - The i<0 error condition is not possible due to the MTTL1 encoding - Improve the wording of the MTTL1 interpretation step - Software must assume caching is occuring; it has no way to know for sure Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
- Fix copy-paste of RERI to I/O MTT - Add word "register" to improve readability - Fix PCIe BDF example table -- the bottom three rows are all intended to be NAPOT rules - `TEE_LIM` was previously renamed to `TEE_FLT` Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
- The interrrupt was previously renamed from "M-level" to "local" - Remove extra and repeated words Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
The pseudocode was inverted compared to the earlier description in the text and the following example. Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
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rsahita
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rsahita
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This was referenced Oct 1, 2024
Co-authored-by: Ravi Sahita <rsahita@yahoo.com> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
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lgtm
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These are non-functional changes to fix several typos and adjust some wording. See the individual commits for details.